Archive: 05/26/2004
UMC Announces a Device Technique that Enhances Silicon-on-Insulator (SOI) Transistor Performance
HSINCHU, Taiwan, May 26, 2004 -- UMC, a world leading semiconductor foundry, today announced the discovery of a new engineering technique that enhances Silicon-on-Insulator (SOI) transistor performance. The Direct-Tunneling induce ...
May 26, 2004 |
not rated yet |
0
USING “SMART FLUIDS” TO RETRAIN MUSCLES
(5-20-04) Boston, Mass. -- Physical rehabilitation has traditionally consisted of arduously retraining the body on weight machines and other resistance devices, but with the growing interest in “smart fluids,” ...
Physics /
May 26, 2004 |
not rated yet |
0
High-K Progress Towards 45 nm
STMicroelectronics, CEA-Leti and AIXTRON Develop Ultra-Thin Gate-Insulation Process for Advanced CMOS Transistors Geneva, May 26, 2004 - STMicroelectronics today announced that ST, CEA-Leti and AIXTRON have developed an ...
May 26, 2004 |
1 / 5 (1) |
0
Thin virtual substrates for strained Si
D. Chrastina and his colleagues from the Politecnico di Milano and the ETH Zurich have developed a method to grow thin relaxed SiGe virtual substrates by low-energy plasma-enhanced chemical vapor deposition (LEPECVD). ...
Physics /
May 26, 2004 |
3 / 5 (5) |
0
TOSHIBA DEBUTS FIRST FULL-COLOR 'SYSTEM ON GLASS' (SOG) INPUT DISPLAY WITH IMAGE CAPTURE TECHNOLOGY
New Color LCD Prototype, which Captures High-Resolution Digital Content via Embedded Sensors, to be Demonstrated at SID 2004 in Seattle SEATTLE, May 25, 2004 - In an effort further develop leading-edge system on glass (SOG) dis ...
May 26, 2004 |
not rated yet |
0
Cadence Delivers 90-Nanometer Reference Flow to Optimize Nanometer Design for IBM-Chartered Process Platform
Cadence Encounter-Based Reference Flow to Provide High Quality of Silicon for Complex 90-Nanometer System-on-Chip Designs San Jose, CA , May 24, 2004 Cadence Design Systems, Inc. (NYSE:CDN) today announced the availabil ...
May 26, 2004 |
not rated yet |
0
- Pages: 1
