Samsung’s ViP Design Methodology Reduces SoC Design Time Up to 40 Percent

Samsung Electronics Co., Ltd., a leader in advanced semiconductor technology, today revealed a hardware/software co-design methodology that will reduce overall design time for the company’s System-on-Chip (SoC) products by up to 40 percent. The Virtual Platform (ViP) approach will ultimately result in faster production of Samsung logic components while giving the company’s customers a time-to-market advantage.

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<p><a href="http://www.physorg.com/news1158.html">Samsung’s ViP Design Methodology Reduces SoC Design Time Up to 40 Percent</a></p> <p><a class="directory" href="http://www.physorg.com/search/Samsung">Samsung</a> Electronics Co., Ltd., a leader in advanced semiconductor <a class="directory" href="http://www.physorg.com/search/technology">technology</a>, today revealed a hardware/software co-design methodology that will <b>reduce overall design time for the company’s System-on-Chip (SoC) products by up to 40 percent</b>. The Virtual Platform (ViP) approach will ultimately result in faster production of Samsung logic components while giving the company’s customers a time-to-market advantage.</p>