International SEMATECH Identifies Top Technical Challenges for 2005

International SEMATECH released its Top Technical Challenges for 2005, re-emphasizing advanced gate stack, 193nm immersion and EUV lithography, and low-k dielectrics, and placing 3-D interconnect on the list for the first time.

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<p><a href="http://www.physorg.com/news186.html">International SEMATECH Identifies Top Technical Challenges for 2005</a></p> <p>International SEMATECH released its Top Technical Challenges for 2005, re-emphasizing advanced gate stack, 193nm immersion and EUV lithography, and low-k dielectrics, and placing 3-D interconnect on the list for the first time.</p>