Infineon Demonstrated New Tunneling FET Enabling Scalable Ultra-Low Voltage Processes in Standard Silicon Technology

Infineon Demonstrated New Tunneling FET Enabling Scalable Ultra-Low Voltage Processes in Standard Silicon Technology

Infineon Demonstrated New Tunneling Field Effect Transistors Enabling Scalable Ultra-Low Voltage Processes in Standard Silicon Technology
At the 2004 IEEE International Electron Devices Meeting (IEDM) in San Francisco (December 13 – 15, 2004) scientists from Infineon Technologies AG introduced several papers representing outstanding achievements each. Together with the Technical University of Munich the company presented a new scalable transistor concept enabling low voltage digital and analog circuits. For the first time ever, complementary Tunneling Field Effect Transistors (TFETs) are fabricated in a standard silicon process with good performance for static and dynamic parameters.

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<a href="http://www.physorg.com/news2376.html">Infineon Demonstrated New Tunneling FET Enabling Scalable Ultra-Low Voltage Processes in Standard Silicon Technology</a> Infineon Demonstrated New Tunneling Field Effect Transistors Enabling Scalable Ultra-Low Voltage Processes in Standard Silicon Technology At the 2004 IEEE International Electron Devices Meeting (IEDM) in San Francisco (December 13 – 15, 2004) scientists from Infineon Technologies AG introduced several papers representing outstanding achievements each. Together with the Technical University of Munich the company presented a new scalable transistor concept enabling low voltage digital and analog circuits. For the first time ever, complementary Tunneling Field Effect Transistors (TFETs) are fabricated in a standard silicon process with good performance for static and dynamic parameters.