Ultra-Dense SRAM cell in 45-nm Low-Cost, Low-Power Conventional Bulk CMOS Technology

The Crolles2 Alliance today presented a paper* describing the creation, under production conditions, of six-transistor SRAM-bit cells with an area less than 0.25 square microns – half the size of earlier solutions – using conventional bulk CMOS technology and 45-nanometer design rules.

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<p><a href="http://www.physorg.com/news4554.html">Ultra-Dense SRAM cell in 45-nm Low-Cost, Low-Power Conventional Bulk CMOS Technology</a></p> <p>The Crolles2 Alliance today presented a paper* describing the creation, under production conditions, of six-transistor SRAM-bit cells with an area less than 0.25 square microns – half the size of earlier solutions – using conventional bulk CMOS technology and 45-nanometer design rules.</p>