IMEC reports breakthrough power efficiency and performance of coarse-grain processor

IMEC’s novel coarse-grain processor, ADRES, meets requirements of design-time and runtime reconfigurability for supporting a broad range of embedded applications. ADRES beats the performance of state-of-the-art DSP processors, while offering the same flexibility and having the power efficiency of state-of-the-art ASIPs. The core can also be used in a multi-core context for high-performance applications.

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<p><a href="http://www.physorg.com/news7812.html">IMEC reports breakthrough power efficiency and performance of coarse-grain processor</a></p> <p>IMEC’s novel coarse-grain processor, ADRES, meets requirements of design-time and runtime reconfigurability for supporting a broad range of embedded applications. ADRES beats the performance of state-of-the-art DSP processors, while offering the same flexibility and having the power efficiency of state-of-the-art ASIPs. The core can also be used in a multi-core context for high-performance applications.</p>