AMD and IBM Detail Early Results Using Immersion and Ultra Low-K in 45nm Chips

At the International Electron Device Meeting today, IBM and AMD presented papers describing the use of immersion lithography, ultra-low-K interconnect dielectrics, and multiple enhanced transistor strain techniques for application to the 45nm microprocessor process generation. AMD and IBM expect the first 45nm products using immersion lithography and ultra-low-K interconnect dielectrics to be available in mid-2008.

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<p><a href="http://www.physorg.com/news85247225.html">AMD and IBM Detail Early Results Using Immersion and Ultra Low-K in 45nm Chips</a></p> <p>At the International Electron Device Meeting today, IBM and AMD presented papers describing the use of immersion lithography, ultra-low-K interconnect dielectrics, and multiple enhanced transistor strain techniques for application to the 45nm microprocessor process generation. AMD and IBM expect the first 45nm products using immersion lithography and ultra-low-K interconnect dielectrics to be available in mid-2008.</p>