Toshiba to demonstrate prototype of new 'SpursEngine' processor
The prototype of SpursEngine will be unveiled at CEATEC JAPAN 2007, at Makuhari Messe, Japan, from October 2nd. Notebook PCs integrating SpursEngine will be used in the world's first public demonstration of the processor's capabilities in 3D image processing and manipulation: real-time transformations of hair styles and makeup that instantaneously recognize and process changes in position, angle, and facial expression, and render them as computer graphics. Toshiba also plans to demonstrate concept notebook PCs integrating the SpursEngine.
SpursEngine, a co-processor that works in cooperation with a host CPU, fuses Cell/B.E.'s high performance multi-core technology with Toshiba's advanced image processing technology to perform stream processing of video sources--image recognition and processing--at the increasingly sophisticated level required by new generations of digital consumer products.
The new co-processor integrates four of Cell/B.E.'s high performance RISC core SPEs, half the number of the full configuration, plus hardware dedicated to decoding and encoding MPEG-2 and H.264 video. By combining the high level, real time processing software of the SPEs with the hardware video codecs, the SpursEngine realizes an optimized balance of processing flexibility and low power consumption. The prototype of SpursEngine operates at a clock frequency of 1.5GHz and consumes power at 10 to 20 watts.
SpursEngine also adopts XDR DRAM memory as working memory, achieving support of high data transfer rates, for large volumes of media data.
Toshiba will bring SpursEngine to market after CEATEC, for application in various digital consumer products, and for use by customers and Toshiba itself, as soon as it completes specifications for commercial production.
The revolutionary Cell/B.E., jointly developed by IBM, Sony Group and Toshiba, is a breakthrough design featuring a central processing core based on IBM's Power Architecture technology and eight synergistic processing elements (SPE). Cell/B.E. brings an unseen level of broadband processing power to digital products.
Synergistic Processor Element is a processor core that has high performance floating point computation capability with an original instruction set architecture, for optimized processing of multiple media applications.
Source: Toshiba
The new co-processor integrates four of Cell/B.E.'s high performance RISC core SPEs, half the number of the full configuration, plus hardware dedicated to decoding and encoding MPEG-2 and H.264 video. By combining the high level, real time processing software of the SPEs with the hardware video codecs, the SpursEngine realizes an optimized balance of processing flexibility and low power consumption. The prototype of SpursEngine operates at a clock frequency of 1.5GHz and consumes power at 10 to 20 watts.
SpursEngine also adopts XDR DRAM memory as working memory, achieving support of high data transfer rates, for large volumes of media data.
Toshiba will bring SpursEngine to market after CEATEC, for application in various digital consumer products, and for use by customers and Toshiba itself, as soon as it completes specifications for commercial production.
The revolutionary Cell/B.E., jointly developed by IBM, Sony Group and Toshiba, is a breakthrough design featuring a central processing core based on IBM's Power Architecture technology and eight synergistic processing elements (SPE). Cell/B.E. brings an unseen level of broadband processing power to digital products.
Synergistic Processor Element is a processor core that has high performance floating point computation capability with an original instruction set architecture, for optimized processing of multiple media applications.
Source: Toshiba
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