Toshiba develops new MRAM device which opens the way to giga-bits capacity
November 6, 2007
Cell Structure. A material with perpendicular magnetic anisotropy, which is used for recording media and a type of cobalt-iron, is employed in the magnetic layer, with magnesium oxide in the insulating layer and cobalt-iron-boron in the interface layers. Credit: Toshiba
Toshiba Corporation today announced important breakthroughs in key technologies for magnetoresistive random access memory (MRAM), a promising, next-generation semiconductor memory device.
The company has successfully fabricated a MRAM memory cell integrating the new technologies and verified its stable performance. Full details of the new technologies were presented today at the 52nd Magnetism and Magnetic Materials Conference in Tampa, Florida, USA which is being held from November 5th to 9th.
MRAM is a highly anticipated next-generation non-volatile semiconductor memory device that offers fast random write/access speeds, enhances endurance in operation with very low power consumption. MRAM can theoretically achieve high level integration as the memory cell structure is relatively simple.
In making these major advances, Toshiba applied and proved the spin transfer switching and perpendicular magnetic anisotropy (PMA) technologies in a magnetic tunnel junction, which is a key component in the memory cell.
Spin transfer switching uses the properties of electron spin to invert magnetization and writes data at very low power levels. It is widely regarded as a major candidate among next-generation principles for new memory devices. PMA aligns magnetization in the magnetic layer perpendicularly, either upward or downward, rather than horizontally as in in-plane shape anisotropy layers.
The technology is being increasingly used to enhance for storage capacity for high-density hard disc drives (HDDs), and Toshiba has successfully applied it to a semiconductor memory device. With PMA data write operation and magnetic switching can be achieved at a low energy level. Toshiba also overcame the hurdle of achieving the required precision in the interface process and significantly cutting write power consumption.
In order to realize a miniature memory cell based on PMA, Toshiba optimized the materials and device structure of the new MRAM. Close observation of performance confirms stable operation (see the diagram for full explanation of structure).
Development of the new MRAM technologies was partly supported by grants from Japan's New Energy and Industrial Technology Development Organization (NEDO).
Source: Toshiba
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This memory cell looks much more complicated than the traditional one transistor one capacitor DRAM memory cell. That in itself makes me dubious.
Nov 09, 2007
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I think the way this would work is that a voltage would be applied on the 1nm CoFeB layer and the base electrode, the current at the cap layer would be read and compared to the current at the CoFeB 2nm layer.
I work at a semiconductor competitor of Toshiba and Toshiba is the company to beat. This is a simpler design than nand. Even if it doesn't work out they'll be a world leader with their 3bit MLC NAND technology. I need to buy some Toshiba stock...