Samsung Develops 70-nanometer DRAM Process Technology

May 28, 2004

The industry’s first development of 70-nanometer DRAM process technology employing the CVD method
Samsung Electronics announced that it has developed the industry’s first “CVD aluminum” process technology, the very latest 70-nanometer node DRAM process technology employing the Chemical Vapor Deposition or CVD method.

The CVD aluminum process technology is one of the key interconection technologies in DRAM manufacturing process. It involves forming conducting films by turning metal organic source, including aluminum, into particles through chemical reactions and depositing them on a wafer surface, and then creating wiring for the interconnecting circuits.

Existing DRAM circuit-wiring processes have employed the Physical Vapor Deposition or PVD method in which thin films are formed by turning solid-state materials into particles. However, due to the problem of “void” in which the deposition is not evenly made on the wafer surface, thus causing problems in the circuit properties, this PVD method has been difficult to apply in the 90-nano-or-less scale processes.

However, if the CVD aluminum process technology is employed, not only is the problem of cavitations addressed, but also the electrical properties of circuit-wiring are dramatically improved, making it an essential process technology in manufacturing 70 nanometer DRAMs.

Furthermore, if this CVD aluminum process technology is employed, analysis shows that it would reduce costs related to circuit-wiring process by up to approximately 20 percent, as it does not require planarization (etch-back) and cleaning process, which have been required until now in circuit-wiring process.

As the application of high-performance DRAMs expands from the PC to mobile and consumer electronics products, it is imperative to develop nano-scale DRAMs in order to respond to the ever-increasing demand. However, until now there has been little progress in the development of next generation DRAM processes in the industry.

On the other hand, Samsung Electronics has been the industry leader in unveiling advanced nanometer-node DRAM process technologies and design technologies such as metal capacitor technology, three-dimensional transistor design technology, and inlaying technique design technology, thereby taking the lead in next generation nanometer-semiconductor technologies and building a foundation for maintaining its competitive advantage in the future.

In particular, the CVD aluminum process technology was submitted as a technology paper at the VLSI (Very Large-Scale Integrated-circuit) Technology Symposium and IEDM (International Electron Device Meeting), the world’s most prestigious semiconductor symposiums, and gained a highly favorable reception. The company has also applied for 15 international patents related to this technology.

Samsung Electronics has already secured 90 nanometer 512Mb DRAM samples by applying the CVD aluminum process technology and plans to unveil 70 nanometer DRAM employing this process technology by the end of the year.

Full press release at
http://www.samsung.com/Products/Semiconductor/