New Nanowire-Based Memory Could Beef Up Information Storage
July 2, 2008 by Laura Mgrdichian
A scanning electron microscope image of a cross section of a GeTe/Ge2Sb2Te5 nanowire (the arrow points to the Ge2Sb2Te5 core).
Researchers from the University of Pennsylvania have created a type of nanowire-based information storage device that is capable of storing three bit values rather than the usual two—that is, "0," "1," and "2" instead of just "0" and "1." This ability could lead to a new generation of high-capacity information storage for electronic devices.
"The use of nanowires to create electronic memory is advantageous for several reasons, but a non-binary form of nanowire memory like we have created could allow for a huge increase in the memory density of potential future devices," said corresponding researcher Ritesh Agarwal, an assistant professor at the UPenn School of Engineering and Applied Science, to PhysOrg.com.
Conventional nanowire-based memory schemes have so far been binary, as is traditional transistor-based memory. In addition to affecting memory density, a non-binary nanowire-based type of memory would allow fewer nanowires to be used to achieve impressive storage capacity. This could allow electronic devices with memory—and that's nearly all of them—to become more compact. Moreover, fewer nanowires to work with means that fabrication could be simpler.
The nanowires used by the UPenn group have a "core-shell" structure, like a coaxial cable, and consist of two phase-change materials. The core is made of germanium/antimony/tellurium compound Ge2Sb2Te5, while the cylindrical shell is made of germanium telluride (GeTe).
The phase changes are achieved by subjecting the nanowires to pulsed electric fields. This process heats the nanowires, altering the core and shell structure from crystalline (ordered) to amorphous (disordered). These two states correspond to two different electrical resistances: a low resistance for the case where both the core and shell are crystalline, and a high resistance when they are both amorphous. In turn, these resistances represent two of the three bit values.
The third value corresponds to the case where the core is amorphous while the shell is crystalline (or visa versa), resulting in an intermediate resistance.
Nanowires are excellent media for information storage, due to several factors. These include their often defect-free crystalline structures, which lead to superior behaviors that can be tuned by varying the nanowires' dimensions, such as diameter, and other controllable properties.
Additionally, creating information storage from nanowires can be done via "bottom-up" approaches—using the natural tendency of tiny structures to self-assemble into larger structures—that may be able to break free of the limitations faced by traditional "top-down" methods, such as patterning a circuit onto a silicon wafer by depositing a nanowire thin film.
In future research, Agarwal and his colleagues plan to investigate how the nanowires' size and chemical composition affects their electrical behavior, with the hope of finding new properties that could lead to electronic devices with novel features.
This work is described in the June 13, 2008, online edition of Nano Letters.
Citation: Nano Lett., ASAP Article, 10.1021/nl801482z
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1hour ago
Well, 32 bits requires 20 trits. That's only a 37% space reduction or a 60% density increase which is less than I usually think of as "huge."
If the researcher proposes to discriminate additional levels, as is done in some types of flash memory, the article doesn't say so. Nor is there any discussion of the costs and added delay of multi-level drivers and sense amps, nor the binary-to-ternary and ternary-to-binary converter logic.
The aforesaid notwithstanding, I think the basic demonstration of nanowire memory is interesting.
The phase change media is heated it up under a magnetic field.
This process changes the opacity of the localized surface which can be used to represent data or information.