Nanotechnology solutions for the post-CMOS era of semiconductor manufacturing

Using nanotechnologies to replace and/or extend the life of advanced CMOS manufacturing technologies is the goal of a new IMEC program announced today. IMEC's industrial affiliation program (IIAP) will seek alternatives to the current use of scaling to reduce device dimensions using nanotechnologies. The program will also investigate disruptive technologies or new paradigms for semiconductor manufacturing processes.

Although single devices have been demonstrated, there has been little effort in using nanotechnology building blocks to create an innovative technology with higher density and new functionality. IMEC program participants will investigate the use of semiconducting wires, carbon nanotubes and spintronics and, at the same time, develop the metrology and theoretical approach required as a backbone for implementation of the new methodologies.

In the first phase of research, the potential of semiconducting wires will be studied. IMEC's fabrication process for making these vertical-pillar structures is now sufficiently mature to start evaluating their use in back-end-of-line (BEOL) processing, more precisely in the vias between the BEOL metal layers. The typical dimensions of the pillars (20nm to 100nm) match perfectly with state-of-the-art optical lithography, demonstrating an ideal link between evolutionary and revolutionary technologies. Applications may be possible in both optical and switching components.

Next, the research will extensively investigate the growth of carbon nanotubes. A main roadblock in this area is "chirality", or the variation in diameter and structure of the tubes.

A third key area of research will focus on spintronics, or electron spin. Electron spin is a viable candidate for replacing the role of the electron charge, as spin effects are very robust. The IIAP will identify roadblocks and explore opportunities of implementing spintronics in combination with silicon technology.

To support this research, the program will develop metrology guidelines and provide theoretical quantitative models which describe newly observed phenomena in nanoelectronics. This will help researchers understand matter at the nanometric scale. A synergy between the development of theoretical formalisms, modeling and experimental work is fundamental to addressing the nanoelectronic challenges.

Citation: Nanotechnology solutions for the post-CMOS era of semiconductor manufacturing (2004, September 30) retrieved 28 April 2024 from https://phys.org/news/2004-09-nanotechnology-solutions-post-cmos-era-semiconductor.html
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