"The combination of Freescale's microprocessor know-how and insight into requirements of embedded systems applications, combined with IMEC's expertise in reconfigurable architectures and system design, makes this collaboration a win-win endeavor," said Rudy Lauwereins, vice-president of Design Technology for Integrated Information and Communication Systems at IMEC.

"IMEC's technology will complement Freescale's long-standing technology position in wireless SoC design and provide our customers with innovative and disruptive semiconductor solutions," said Ken Hansen, senior technical fellow and director of advanced technology for Freescale’s wireless group. "By working together, this vision of seamless mobility may be a reality earlier than originally anticipated."

The architecture is based on IMEC's novel processor architecture template, which combines VLIW (very-long instruction word) processors and coarse-grain reconfigurable hardware. The combination of these two highly parallel processor architectures complemented with adequate memory architecture, provides an ultra-low-power ASIP (application-specific instruction set processor) with increased flexibility and performance. Together with the architecture template, a C compiler is developed which provides efficient mapping of applications allowing a fast design cycle while keeping the performance breakthrough delivered by the new architecture.