ARM Announces 45nm SOI Test Chip Results That Demonstrate 40 Percent Power Savings Over Bulk Process

ARM and Soitec collaborated to produce a test chip to demonstrate the power savings in a real silicon implementation with a well-known, industry-standard core. The goal was to produce a comparison of 45nm SOI high-performance technology with bulk CMOS 45nm low-power (LP) technology of the same product.

The silicon results show that 45nm high-performance SOI technology can provide up to 40 percent power savings and a 7 percent circuit area reduction compared to bulk CMOS low-power technology, operating at the same speed. This same implementation also demonstrated 20 percent higher operating frequency capability over bulk while saving 30 percent in total power in specific test applications.

“This benchmark by ARM and Soitec clearly demonstrates the potential power/performance benefits of our sixth-generation 45nm SOI technology now available to both ASIC and foundry clients,” said Mark Ireland, vice president, Semiconductor Products & Services, IBM. “Validating the power advantage of SOI with an industry-standard ARM processor demonstrates the possibilities for SOI adoption in the digital consumer electronic segment.”

The design was implemented using ARM and IBM standard SOI libraries and leading EDA tools. The IP ecosystem and manufacturing solutions are in place for design starts with ARM and IBM libraries on IBM 45nm SOI technology.

Source: ARM