Applied Materials and AmberWave Collaborate to Deliver 300mm Strained Silicon Technology

"Using AmberWave's strained silicon technology and the Applied Centura RP Epi system, we created a highly manufacturable 300mm strained silicon epitaxial process for advanced substrates used in developing high-performance transistor designs," said Dr. Randhir Thakur, vice president and general manager of Applied Materials' Front End Products group. "This strained silicon solution can dramatically accelerate the development process for chipmakers and wafer manufacturers without a large investment in process engineering."

AmberWave's strained silicon IP includes proprietary structures and processes to strain or "stretch" silicon's crystalline lattice structure, providing a cost-effective way to increase transistor speed or reduce power consumption. Very high levels of strain can be generated to achieve device improvements on both bulk silicon and SOI (silicon on insulator) wafers without scaling the size of the transistor. Devices fabricated with AmberWave's strained silicon technology have demonstrated up to 17% increase in speed and 34% reduction in power consumption compared to transistors fabricated with traditional silicon.

Richard Faubert, president and CEO of AmberWave, said, "This collaboration is a perfect fit for AmberWave. We expect to see many different types of high-performance devices profiting from the higher speed and lower power consumption of strained silicon."