SEMATECH Meeting Identifies Challenges to Maturing Maskless Lithography

The SEMATECH Industry Maskless Meeting, held Jan. 17-19, drew together engineers, designers, and senior representatives of more than 50 manufacturers, suppliers and institutions addressing ML2. The technologies covered were optical maskless (O-ML2) and charged particle maskless (CP-ML2).

The Maskless Meeting was part of the 2005 SEMATECH Knowledge Series, a collection of single-focus industry meetings designed to increase global knowledge in key areas of semiconductor R&D. Presentations and poster sessions from some 20 maskless proponents were aired in a two-day session that culminated in audience identification of top technical issues, which then were clarified and classified by the 24-member steering committee.

“The costs of developing mask sets for leading-edge litho applications are becoming a growing concern for many IC manufacturers,” said Walt Trybula, SEMATECH Senior Fellow and meeting organizer. “Clearly, maskless lithography is a potential solution for the mask cost issue.”

ML2 challenges centered on business and technical issues, as well as concerns over the overall maturity of the various technologies and markets. Specific concerns and issues identified by the steering committee were as follows:

Key observations:

-- There is a large number of promising technologies for ML2
-- The immaturity of all programs indicates the need for further development requirements
-- Several potential markets were identified for ML2, but more work is required to identify the potential of each

Business issues for both O-ML2 and CP-ML2:

-- Throughput
-- Timing for market
-- Development funding

Technical issues for both O-ML2 and CP-ML2:

-- Beam calibration, verification and inspection of pixels on wafer
-- Compatibility with optical lithography process
-- Data storage, volume, and transmission
-- Data verification, redundancy, compression
-- Platform
-- Stitching errors affecting critical dimension (CD) and overlay

Specific issues for charged-particle maskless:

-- Beam current versus throughput tradeoff and extensibility
-- Beam stability/reliability
-- Blanker array
-- Contamination/charging of column
-- Corrections (proximity, heating, other)
-- Source stability/dose accuracy/shot noise

Specific issues for optical maskless:

-- Laser requirements
-- Resolution extensibility
-- Modulator

The meeting was organized by SEMATECH to identify and assess the status of promising candidates in CP-ML2 and O-ML2. Although the presentations included a variety of multibeam, single-beam and optical approaches, a consensus emerged that near-term ML2 likely could be a niche technology rather than a replacement for dominant methods, such as optical immersion and extreme ultraviolet (EUV) lithographies.

Contributing to the meeting's conclusions were data and comments from a wide variety of presenters:

On business and history:

-- Dan Herr of the Semiconductor Research Corporation (SRC) cited an SRC study of technology innovations since 1700 as showing that it takes about 30 years for a new technology to evolve from a mere idea to actual manufacturing. Noting the industry's need for faster than historic speeds, however, he added: “Early identification of research directions becomes a strategic imperative.”

-- Hans Pfeiffer of HCP Consulting Services (Monterey, C A) gave a quick tour of e-beam history that recounted successful maskless efforts going back to the 1980s. Pfeifer said the technology “can solve very important problems in the semiconductor industry,” adding that the development of MEMS and advanced CMOS has made maskless much more feasible than in the recent past. “We have an infrastructure of technology today that didn't exist 10 years ago,” he said.

-- Mart Graef of Europe's MEDEA+ consortium detailed the business case for maskless, saying the technology is not yet cost-effective but adding that ML2 may speed product development. “Flexibility, not cost reduction, is a pressing driver for maskless lithography,” Graef said. “The benefit of using maskless… is in shortened development time.”

On O-ML2:

-- ASML officials sketched an optical maskless project using deep ultraviolet (DUV) light with spatial light modulators (SLMs). ASML Product Manager Kars Troost described a prototype system using 193 nm wavelength to produce five 300 mm wafers per hour at the 65 nm and 45 nm nodes. “SLM is capable of doing good lithography,” said Troost.

On CP-ML2:

-- Representatives of MAPPER Lithography, the Netherlands, said their company would develop later this year a small-field, massively parallel e-beam tool providing one wafer per hour, with a full-field production tool anticipated at the end of 2006. They added that the ultimate goal calls for production-level tools patterning 45 nm half-pitch at 10 wafers per hour. “Throughput is always the issue with e-beam,” said Guido de Boer, MAPPER's chief engineer.

-- Akio Yamada of ADVANTEST Technology, Japan, described his company's multi-column cell (MCC) technology system, which passes 16 electron-beam columns through mini-patterns called “characters” to describe images on a wafer. Yamada said his company's goal for MCC is to produce devices for the 65 nm and 45 nm technology nodes on 300 mm wafers, at an estimated throughput of nine wafers per hour.

-- Projection maskless lithography (PML2), which sends a single electron beam through a programmable aperture plate that adjusts and directs the beam to form specific patterns, was outlined by Christoph Brandstatter of IMS-Jena, part of a consortium of European companies backing the technology. PML2 has potential to produce five 300 mm wafers per hour at the 45 nm, 32 nm and 22 nm technology nodes and beyond, Brandstatter asserted.

-- A column of square-shaped beams that proponents say is best suited for chip designs was the key feature of the vector-based tool from Multibeam Systems, Inc. of Santa Clara, CA. The concept uses a column of 10 “fixed-shape” beams, so-called because each is held constant for about 1 microsecond--long enough to describe a pattern. N. William Parker, chief technology officer, a demo system will be shown in October, with an e-beam direct write (EBDW) product planned in June 2007.

“We are very pleased with the global participation in the workshop, and with the outcome--the exploration of potential maskless solutions," said Giang Dao, SEMATECH's drector of Lithography. “SEMATECH will continue to be a focal point for the semiconductor industry in helping bring maskless to appropriate levels of technical and business maturity.”