First Silicon Success on Altera's 90-nm, Low-k Products, built on TSMC’s Nexsys™ 90-nm process

“We have followed a strict ‘design for manufacturability’ methodology developed with TSMC, to address lithography issues, process margins, and power management requirements,” said Francois Gregoire, vice president of technology at Altera. “Both partners have a firm commitment to excellence in delivering product to customers. We started a process three years ago that included evaluating low-k and building 90-nm test chips that validated all aspects of the technology. As a result of this systematic work with TSMC, we are very confident in the smooth rollout of our 90-nm devices.”

Stratix II devices are the only high-performance, high-density FPGAs available to customers on 90-nm with low-k. In addition to offering higher performance, low-k dielectrics are expected to be the standard for mainstream 90-nm processes, resulting in better yields and lower costs. Because of TSMC’s early qualification of all-copper and low-k processes at the 0.13-micron node, the foundry observed no new materials challenges at the 90-nm node. The result of this approach is validated by this month’s smooth rollout of the Altera Stratix II EP2S60 device to customers.

“Because FPGAs are increasingly being used in production as system-level components, customers count on us to deliver parts when we say we will,” said Erik Cleage, Altera’s senior vice president of marketing. “Altera’s ability to meet its commitments to customers is due in large part to the successful partnership we have with TSMC.”

In their collaboration, the two partners developed and ran multiple test chips to optimize transistor characteristics and interconnect performance on TSMC’s Nexsys 90-nm technology. The goal of the collaboration was to address and resolve the 90-nm and low-k challenges before going into production. Additionally, in contrast to other companies that are struggling to build small devices on the 90-nm process, Altera’s choice of starting with a larger density device to rapidly debug the process has proved to be the correct strategy. This methodology is expected to ensure a production ramp that is capable of supporting Altera’s customer demand, while allowing TSMC to leverage their work with FPGAs into further successes with their customers.

“Our work over the years with Altera has resulted in a number of innovations and successes, including copper interconnect and low-k dielectrics. TSMC remains the only foundry with two generations of low-k and copper-based process technology in production,” said Genda Hu, TSMC vice president of marketing. “With a multitude of customer products in various stages of design and production, plus two 300-mm fabs ramping 90-nm to volume, TSMC is poised to lead the industry at this advanced technology node.”

More information is available at http://www.altera.com/