IBM, Chartered and Samsung Extend Common Design Enablement Platform for 65-Nanometer Base and Low-Power Processes

Specifically, IBM, Chartered and Samsung will offer 65nm designers common design kits that consist of physical verification [design rule checking (DRC) and layout versus schematic (LVS) matching] and parasitic extraction (RCX) technology files. Additionally, the companies will also make available common SRAM kits for single- and dual-port memories, eFUSE kit and electrostatic discharge (ESD) kit. These initial design kits have been validated using a test chip, which further demonstrates their capabilities for realizing fast and silicon-accurate 65nm designs.

"Extending our collaboration from technology development to design enablement development, IBM, Chartered and Samsung are accelerating efforts to enable a comprehensive ecosystem of design support around the 65nm technology platform," said Steve Longoria, vice president, Semiconductor Technology Platform for IBM. "This model of true collaboration and open design differentiates the common platform and provides customers cutting-edge technology, enhanced design portability, and multi-sourcing flexibility."

"At 65nm, IBM, Chartered and Samsung have taken steps to define and develop process-optimized solutions in tandem with the design community," said Kevin Meyer, vice president of worldwide marketing at Chartered. "The customer benefits are the early availability of manufacturing-aware design solutions tuned for enabling the manufacturability of 65nm designs."

"Combining our efforts with IBM and Chartered at 65nm will result in a very compelling solution that is the base for a unique compatibility in the industry," said KP Suh, Executive Vice President of Technology Development at Samsung. "This strategy also significantly expands the expertise required by our internal users and external customers to address the complex design requirements for a range of cutting-edge system-on-chip products."