A look at the future of nanoelectronics

Many people involved in the IC business nostalgically think back to the days of happy scaling when ‘simple’ transistor miniaturization went hand in hand with higher performances and lower costs. These days are over. Instead we are confronted with short-channel effects and leakage problems leading to a ‘power catastrophe’ in future ICs. Rather complex technological innovations such as new device architectures and multiple-gate devices, high-k materials, metal gates and strained silicon, are needed. Next to this power dissipation problem, engineers are dazzled with an increasing intra-die variability for which no obvious cure exists from a technological point of view.

For these and other problems, a strong interaction is needed between process engineers and system designers. No longer can they continue on ‘living apart together’, but they have to join forces and discuss on how they can circumvent certain problems, TOGETHER. For example, to tackle the problem of intra-die variability, system designers will have to come up with new methods to design reliable electronic systems out of these ‘unreliable’ components. Parallel or multi-task architectures must help in realizing power-efficient systems. And also lithographers and designers have to learn speaking each other’s language to put a stop to the increasing complexity in lithography techniques, for example by designing highly regular cell and interconnect architectures reducing mask/design cost, and litho-friendly layouts improving printability. Nanotechnology will play a key role in the ultimate fulfillment of Moore’s law. Carbon nanotubes and semiconducting nanowires are considered as possible gateways to the final shrink that will end the scaling around 5nm physical gate length.

But not only is there the transition from the ‘era of happy scaling’ to the more challenging ultimate-CMOS era, there is also a changing society impacting the demands put on the IC industry. Until 2000 the technological advancements in the IC world were driven by the growing computing power of the PC. But in the post-PC world in which we are living today, people want ‘smart’ home and car appliances, portable devices enabling secure trustworthy computing and communication at any place and at any time. The medical world and its patients want sensor networks allowing more safety, living comfort and better health monitoring. The post-PC world is an Ambient Intelligence world.

This embedded-everywhere world surely needs ‘More Moore’ or the continuation of the miniaturization process to provide the needed computing and memory functionalities. However, focus no longer is on faster computing but instead, power-efficiency and flexibility are the main targets. The most innovative aspect of Ambient Intelligence, namely the interaction of the devices with the user and the ambient, requires ‘More than Moore’, referring to technologies emerging around CMOS: RF, passives, MEMS, sensors, power devices, displays etc. Nanotechnology based on the interaction between engineers, physicists, chemists, biologists and medical doctors will be a key enabler to expand CMOS technology in this way. A striking example of this can be found in the field of biosensors and neurons-on-chip where surface chemistry is used to bridge the gap between the seeming chaos of living tissue and the planar geometry of microelectronics. Whereas the ‘More Moore’ world requires mastering giga-complexity, the ‘More than Moore’ world demands for ultra-creativity inspired by a multitude of technologies.

For sure we face challenging times, but at the same time future has never been so exciting for the scientist with a sharp eye and an open mind. And the outlook is fascinating: more than ever will computing and communication devices, their networks and everything they connect, help humans reach their dreams.

IMEC