UMC, ARM Partner to Deliver Comprehensive SOI Solutions for 65nm Technology

UMC and ARM today announced that a test chip built with ARM SOI (Silicon On Insulator) libraries was taped-out successfully on UMC's 65-nanometer (nm) SOI process. The test chip consists of a set of ARM physical IP that uses a standard cell library, an I/O library and a single-port SRAM memory compiler. This tape-out at UMC represents the next step towards mainstream adoption of nanometer SOI technology for improved speed and power in complex system on chips (SOCs).