IMEC advancing state-of-the-art in FinFETs

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Stage delay of NAND and NOR gates in dependence of fan-in slowest input and SEM picture of NAND3 gate. Credit: IMEC
Stage delay of NAND and NOR gates in dependence of fan-in, slowest input and SEM picture of NAND3 gate. Credit: IMEC
At this week’s VLSI Symposium, IMEC presents significant progress in the manufacturability, circuit performance and reliability of FinFETs. The results advance FinFET process technology towards being a candidate for the 32nm node and beyond.


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