Hitachi, Renesas Develop Technology to Enable Interconnection of Stacked Chips at Room Temperature
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Hitachi, Ltd. and Renesas Technology Corp. today announced a new stacked chip technology that uses a through-hole interconnection method to enable chips to bond at room temperature. The new technology eliminates the need for wire bonding and reduces package thickness by more than 60% for the most advanced SiP (System in Package) products. The method offers a new packaging technology option for developing 3D-stacked SiP products.
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