Samsung Develops 3D Memory Package that Greatly Improves Performance Using Less Space

Samsung Electronics announced today that it has developed a small-footprint, wafer-level processed stack package (WSP) of high density memory chips using 'through silicon via' (TSV) interconnection technology. WSP actually reduces the physical size of a stacked set of semiconductor chips, while greatly improving overall performance. Widely seen as the next generation in package technologies, WSP can be applied to all types of hybrid packages, including memory and processors, to deliver higher speed and higher density with minimum use of chip space.