Breaking the performance barrier of 22-nm CMOS technology

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Schematic cross section of a MOSFET transistor. The DUALLOGIC project aims to investigate the integration of new materials in what the so-called transistor gate to advance chip technology beyond todays 22-nm generation. Credit: IBM
Schematic cross section of a MOSFET transistor. The DUALLOGIC project aims to investigate the integration of new materials in what the so-called transistor gate to advance chip technology beyond today’s 22-nm generation. Credit: IBM

A major initiative has been launched in Europe with a top-ranked project called DUALLOGIC, Dual channel CMOS for (sub)-22 nm high performance logic.


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