UMC's 90nm process does not meet the ITRS definition, according to Chipworks report

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Chipworks Inc. the standard setting supplier of reverse engineering services, announced that they are analyzing the Xilinx XC3S200 Spartan-3 FPGA. Findings indicate a discrepancy in reported process techniques. Chipworks found that transistor gate lengths is less than 70nm, and a metal 1 (M1) pitch of ~250nm. While these do not meet the letter of the ITRS (International Technology Roadmap for Semiconductors) definition of 90nm feature sizes.


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All News summaries for May 28, 2004