Cadence and CoWare Deliver Electronic System-Level (ESL) Design-for-Verification Flow

System-Level Design Knowledge Reduces Verification Effort by Up to 50%

San Jose, CA , June 1, 2004 -- Cadence Design Systems, Inc. and CoWare(R) Inc., the leading supplier of system-level electronic design automation (EDA) software and services, announced the availability of an integrated, seamless flow from electronic system-level (ESL) design through verification for complex system-on-chip (SoC) designs. The ESL design-for-verification solution-which marks a major milestone on the strategic alliance roadmap between the companies-enables customers to capture system-level design knowledge and apply it later in the design process to reduce verification time by up to 50%. The flow is based on new integration between the latest releases of CoWare's SystemC-based ConvergenSC(TM) SoC design tools and ConvergenSC Model Library and the Cadence(R) Incisive(TM) functional verification platform.