Search results for +"65 nm" :
 Researchers report finer lines for microchips: Advance could lead to next-generation computer chips, solar cellsMIT researchers have achieved a significant advance in nanoscale lithographic technology, used in the manufacture of computer chips and other electronic devices, to make finer patterns of lines over larger ... |
 Breaking the performance barrier of 22-nm CMOS technologyA major initiative has been launched in Europe with a top-ranked project called DUALLOGIC, Dual channel CMOS for (sub)-22 nm high performance logic. |
AMD Unleashes ATI Radeon HD 2600 and HD 2400 SeriesAMD today announced the arrival of the ATI Radeon HD 2600 and ATI Radeon HD 2400 series, the mid-range and entry-level graphics processors in the ATI Radeon HD 2000 series. |
 IBM Extends Moore's Law to the Third DimensionIBM today announced a breakthrough chip-stacking technology in a manufacturing environment that paves the way for three-dimensional chips that will extend Moore’s Law beyond its expected limits. The technology ... |
International Symposium Identifies Top Issues for sub-40 nm Immersion LithoBolstered by evidence that 193 nm immersion (193i) lithography is here to stay, semiconductor technology leaders have identified the top five critical issues for extending the breakthrough imaging process toward the 32 nm ... |
Sematech Advances Feasibility of 193 nm Immersion Lithography for 45 nmSematech researchers have successfully used 193 nm immersion technology (193i) at 1.3 numerical aperture (NA) with azimuthal polarization to pattern features narrower than 45 nm half-pitch in multiple orientations simultaneously. ... |
NEC Develops Highly-Reliable Metal/High-K Gate Stack TransistorNEC Corporation (NEC) today announced the joint development of a new technology for realizing low-power and high-performance SOC devices of technology nodes of 65 nm, 45 nm and beyond. The developed technology enables fabrication ... |
Infineon says 65nm phone chip is availableInfineon Technologies said Friday its pioneering 65 nanometer chips were being released for use in wireless phones. |
 Penn-State Philips CMOS transistor model adopted as industry-wide standard for future nanometer chip designPhilips and the Pennsylvania State University today announced that their jointly developed PSP (Penn State Philips) complementary metal-oxide semiconductor (CMOS) transistor model has been selected by the Compact ... |
Renesas, Grandis to Collaborate on Development of 65 nm MRAM Employing Spin Torque TransferRenesas Technology and Grandis, Inc. have agreed to collaborate on the development of 65 nm process MRAM (Magnetic Random Access Memory) employing spin torque transfer writing technology. Renesas Technology will start to ... |
Freescale and Cadence partner to innovate semiconductor product designFreescale Semiconductor and Cadence Design Systems, Inc. have signed a multi-year agreement designed to help Freescale realize competitive advantages by boosting new product design efficiency and speeding the delivery of ... |
Improved Materials Dominate Chip EvolutionMaterial innovation has replaced scaling as the primary source of performance and feature improvements in leading-edge CMOS semiconductors, IBM technologist Paul Farrar, Jr. told attendees at the ISMI Symposium on Manufacturing ... |
Intel Developing Ultra-Low Power Manufacturing ProcessAdditional 65nm Process Will Stretch Battery Life of Mobile Devices
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Microwavable chips for wireless communicationA recent EU project designed and developed a new demonstrator microchip that will dramatically cut the cost of producing new wireless products and could mean that a whole range of existing products will be enabled for wireless ... |
Ultra-Dense SRAM cell in 45-nm Low-Cost, Low-Power Conventional Bulk CMOS TechnologyThe Crolles2 Alliance today presented a paper* describing the creation, under production conditions, of six-transistor SRAM-bit cells with an area less than 0.25 square microns – half the size of earlier solutions – using ... |
