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TI developes 45-nm chip production process

Technology / Semiconductors

created Jun 12, 2006 | popularity 2.7 / 5 (3) | comments 0

Texas Instruments said Monday it had developed a 45-nanometer wet lithography process that doubles the number of chips it can produce on a silicon wafer.


Sematech Advances Feasibility of 193 nm Immersion Lithography for 45 nm

Technology / Semiconductors

created Oct 05, 2006 | popularity 3 / 5 (2) | comments 0

Sematech researchers have successfully used 193 nm immersion technology (193i) at 1.3 numerical aperture (NA) with azimuthal polarization to pattern features narrower than 45 nm half-pitch in multiple orientations simultaneously. ...


Solutions Emerging for Wafer Cleaning at 45 nm and Beyond

Technology / Semiconductors

created May 21, 2007 | popularity 5 / 5 (1) | comments 0

Potential solutions are starting to emerge for preparing wafers for manufacturing at and beyond the 45 nm technology generation, technologists indicated at a recent industry meeting organized by SEMATECH.


ASML Introduces the Industry's Highest NA Immersion Tool for Volume Chip Production at 45 nm Node

Technology /

created Jul 13, 2005 | popularity 2 / 5 (1) | comments 0

ASML Holding NV (ASML) today announced a new lithography system with the highest numerical aperture (NA) – 1.2 – in the semiconductor industry. The ASML TWINSCAN XT:1700i system is a 193 nm immersion scanner capable of volume ...


Breaking the performance barrier of 22-nm CMOS technology

Breaking the performance barrier of 22-nm CMOS technology

Technology / Semiconductors

created Feb 19, 2008 | popularity 4.2 / 5 (29) | comments 1

A major initiative has been launched in Europe with a top-ranked project called DUALLOGIC, Dual channel CMOS for (sub)-22 nm high performance logic.


AMD, Partners Produce Test Chip Using EUV Lithography

Technology / Semiconductors

created Feb 26, 2008 | popularity 4.4 / 5 (22) | comments 4

AMD, working together with its research partner, IBM, announced it has produced a working test chip utilizing Extreme Ultra-Violet (EUV) lithography for the critical first layer of metal connections across the entire chip. ...


Ultra-Dense SRAM cell in 45-nm Low-Cost, Low-Power Conventional Bulk CMOS Technology

Technology /

created Jun 15, 2005 | popularity 2 / 5 (1) | comments 0

The Crolles2 Alliance today presented a paper* describing the creation, under production conditions, of six-transistor SRAM-bit cells with an area less than 0.25 square microns – half the size of earlier solutions – using ...


Molecular Switches: Optoelectronic components based on a dye-sensitized TiO2 solar cell

Nanotechnology /

created Apr 24, 2006 | popularity 3.4 / 5 (11) | comments 0

Electronic components must continue to get smaller: Miniaturization has now reached the nanometer scale (10-9 m). In this tiny world, classic semiconductor technology is reaching its limits. We now need switches and other ...


Hybrid nano-CMOS chips could be far denser, but cooler

Nanotechnology / Nanophysics

created Jan 16, 2007 | popularity 4.4 / 5 (28) | comments 0

Hewlett-Packard today announced research that could lead to the creation of field programmable gate arrays (FPGAs) up to eight times denser – while using less energy for a given computation – than those currently being produced.


SEMATECH and Synopsys to Develop Advanced OPC Models For 45 nm and Below Immersion Lithography

Technology /

created Oct 04, 2005 | popularity 4 / 5 (1) | comments 0

Synopsys, Inc. and SEMATECH today announced a joint program to develop advanced optical proximity correction (OPC) models that will enable the extension of optical lithography.


Breakthrough Ultra-High-Speed Memory Technology That Solves Scaling Pace Limit in Embedded Memory Design

Technology /

created Feb 10, 2005 | popularity not rated yet | comments 0

NEC Electronics Corporation announced that they have succeeded in developing an ultra-high-speed memory technology that solves the design scaling limit caused by noise margin degradation in ultra-high speed embedded memory. ...


Soitec, ATDF to Develop Multi-Gate Field Effect Transistors (MuGFETs) for 45-nm Technology and Beyond

Technology /

created Jan 05, 2005 | popularity not rated yet | comments 0

In an effort to accelerate the development of new-generation transistors, Soitec, today announced its participation as the SOI substrate supplier in a development program led by ATDF -- Advanced Technology Development Facility ...


NEC Electronics Unveils 90-Nanometer Embedded DRAM Technology

NEC Unveils 90-Nanometer Embedded DRAM Technology

Technology /

created Mar 07, 2005 | popularity not rated yet | comments 0

New ZrO2 Dielectric Material Increases Performance of CMOS-Compatible Embedded DRAM NEC Electronics Corporation today announced its new metal insulator metal (MIM) technology for 90 nanometer embedded DRAM ( ...


SSRM image of 45nm Generation Transistor

Toshiba's breakthrough in SSRM technology will Improve Cutting-Edge LSI

Nanotechnology / Nanophysics

created Apr 16, 2007 | popularity 4.4 / 5 (26) | comments 0

Toshiba Corp. today announced that it has achieved a breakthrough in imaging electron-carrier paths and impurities in semiconductors that allows analysis at the 1-nanometer level for the first time. This major ...


Synthetic Capsules Made of Natural Building Blocks

Chemistry / Polymers

created Mar 23, 2009 | popularity 3 / 5 (2) | comments 0

(PhysOrg.com) -- The basis of all life forms are vesicles: membrane-enclosed, liquid-filled “bubbles” made of lipids, proteins, and carbohydrates. Cells, which are separated from the surrounding medium by their cell membrane, ...