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Intel, Samsung, TSMC Reach Agreement for 450mm Wafer Manufacturing Transition

May 06, 2008 | User rating: 4 / 5 after 8 vote(s) | pda version

Intel Corp., Samsung Electronics and TSMC today announced they have reached agreement on the need for industry-wide collaboration to target a transition to larger, 450mm-sized wafers starting in 2012. The transition to larger ...


SEMATECH Achieves Single Digit EUV Mask Blank Defect Goal

Feb 11, 2008 | User rating: 2 / 5 after 1 vote(s) | pda version

Technologists at SEMATECH have successfully demonstrated world-class results in low defect density for mask blanks used in extreme ultraviolet lithography (EUVL)—pushing the technology another significant step toward readiness ...


Novel gate dielectric materials: perfection is not enough

Oct 16, 2007 | User rating: 4.7 / 5 after 9 vote(s) | pda version

For the first time theoretical modeling has provided a glimpse into how promising dielectric materials are able to trap charges, something which may affect the performance of advanced electronic devices. This ...


Sematech Reveals Details on Practical High-K Metal Gate Systems for 45nm And Beyond

Aug 20, 2007 | User rating: 4.1 / 5 after 8 vote(s) | pda version

Building on their successful CMOS solution for gate‑first, thermally stable, high-k dual metal gates, SEMATECH researchers have released further data that portends a new era in which future transistor scaling is dominated ...


SEMATECH and NIST Collaborate on Chemical Analysis of Advanced Gate Dielectrics

May 30, 2007 | User rating: 4 / 5 after 2 vote(s) | pda version

Nitrogen incorporation in thin HfO2/SiO2 film systems representative of high-k gate dielectric layers in advanced metal-oxide semiconductor field-effect transistors (MOSFETs) has been ...


Solutions Emerging for Wafer Cleaning at 45 nm and Beyond

May 21, 2007 | User rating: 5 / 5 after 1 vote(s) | pda version

Potential solutions are starting to emerge for preparing wafers for manufacturing at and beyond the 45 nm technology generation, technologists indicated at a recent industry meeting organized by SEMATECH.


Research on Novel Materials Holds Key to Extending Immersion Lithography

Mar 09, 2007 | User rating: 3.8 / 5 after 6 vote(s) | pda version

The future of 193 nm immersion (193i) lithography will be driven by the demonstration of a high-index lens material, invention of a third generation immersion fluid, and development of a high-index photoresist, Sematech-sponsored ...


International Symposium Identifies Top Issues for sub-40 nm Immersion Litho

Oct 17, 2006 | User rating: 2.7 / 5 after 6 vote(s) | pda version

Bolstered by evidence that 193 nm immersion (193i) lithography is here to stay, semiconductor technology leaders have identified the top five critical issues for extending the breakthrough imaging process toward the 32 nm ...


Sematech Advances Feasibility of 193 nm Immersion Lithography for 45 nm

Oct 05, 2006 | User rating: 3 / 5 after 2 vote(s) | pda version

Sematech researchers have successfully used 193 nm immersion technology (193i) at 1.3 numerical aperture (NA) with azimuthal polarization to pattern features narrower than 45 nm half-pitch in multiple orientations simultaneously. ...


Engineers Identify Materials for nMOS Metal Gate Electrodes

Mar 30, 2006 | User rating: 2.4 / 5 after 5 vote(s) | pda version

Sematech engineers have identified metal electrode materials that can be used to build reliable nMOS transistors with high‑k dielectric – a major milestone in the quest to fabricate working CMOS devices using metal ...


Sematech to Investigate Alternate Channel Materials for Advanced Microchips

Mar 09, 2006 | User rating: 3.3 / 5 after 3 vote(s) | pda version

Pushed by the scaling limits of silicon-based devices, Sematech engineers have launched a project to investigate alternative materials to Si in MOSFET channels, the critical pathways that allow electrical signals to flow ...


Improved Materials Dominate Chip Evolution

Nov 03, 2005 | User rating: 3.8 / 5 after 4 vote(s) | pda version

Material innovation has replaced scaling as the primary source of performance and feature improvements in leading-edge CMOS semiconductors, IBM technologist Paul Farrar, Jr. told attendees at the ISMI Symposium on Manufacturing ...


Nano World: Technique peers under surfaces

Oct 18, 2005 | User rating: 5 / 5 after 1 vote(s) | pda version

Scientists can now spot microscopic defects hidden inside any material and parasites within cells using a new imaging method that can peer through surfaces to see buried objects nanometers in size, experts told UPI's Nano ...


SEMATECH and Synopsys to Develop Advanced OPC Models For 45 nm and Below Immersion Lithography

Oct 04, 2005 | User rating: 4 / 5 after 1 vote(s) | pda version

Synopsys, Inc. and SEMATECH today announced a joint program to develop advanced optical proximity correction (OPC) models that will enable the extension of optical lithography.


193nm Immersion litho on track for 45nm half pitch

Sep 22, 2005 | User rating: 2.8 / 5 after 4 vote(s) | pda version

Demonstrating significant progress in all aspects of the technology, 193nm immersion lithography is on track for insertion into volume manufacturing, with good prospects for extendibility to subsequent generations, concluded ...


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